M42de DP2.1/USB-C/eDP信号发生器/协议分析

Key Features
• Equipped with USB-C ports and new enhanced full-size DisplayPort (DP80) connectors for Tx and Rx functions
• Fully supports UHBR sink and source testing at 10Gb/s, 13.5Gb/s and 20Gb/s lane rates with 128b/132b line coding 
• Supports DP 1.4 (HBR3) source and sink testing including broad coverage for VESA compliance testing
• View incoming video and metadata (including DSC compressed) from a source device
• Capture and decode video, protocol, control packets including Display Stream Compression (DSC) and Multi-Stream Transport (MST)
• Custom video generator can test displays at HBR and UHBR lane rates with large format and image library
• Configure link training parameters to test display’s handling of link training 
• Generate Display Stream Compression (DSC), select patterns and configure slices and video parameters
• View and edit EDID and DPCD registers 
• Monitor AUX Channel transactions while emulating a DP 1.4 or DP 2.1 source or sink
• Exclusive: T.A.P.4 passive monitoring mode provides visibility to Main Link and AUX Channel traffic for debug of interoperability issues between real DP 2.1 devices
• Test source and sink devices with Panel Replay capability
• Python-based automation API allows running compliance and custom verification tasks in unattended mode
• Support for LTTPR in non-transparent mode for 128b/132b at UHBR rates and 8b/10b encoding for lane rates up to HBR3
• View Power Delivery (PD) protocol negotiations or USB-C DP Alt Mode in the Aux Channel Analyzer utility