M41h HDMI2.1信号发生器/协议分析仪

Key Features
• Verify the 16b/18b encoding for Fixed Rate Link (FRL) Packets in both 3 and 4 lane configurations
• Use generator or analyzer in three (3) Lane configuration mode at 3Gbps & 6Gbps data rates and four (4) Lane configurations at 6Gbps through 12Gbps (48Gbps aggregate)
• Video generator function supports TMDS and FRL for video resolutions up to 8K at 2376MHz pixel rates 
• Certified “Test Device Approved for Dolby Labs, Inc.” for HDMI & eARC Dolby audio generation & analysis including Source Led Dolby Vision tests.
• Evaluate 4K & 8K HDR10 UHDTVs w/HDR Lab
• View captured FRL and TMDS data elements graphically in Event Plot and in Data Decode table; use searching and filtering to find data
• View FRL packet mapping into Character Blocks and Character Block mapping into Super Blocks
• Verify Display Stream Compression (DSC) on FRL, DSC capable source or sink devices.
• Run FRL & DSC source & sink compliance tests
• Run eARC the full suite of compliance tests on an eARC Tx or Rx device
• Run TMDS source & sink compliance tests
• Run HDCP 2.3 source, sink & repeater compliance tests
• View TMDS video, protocol, data island, preamble and control elements
• Monitor of FRL Link Training transactions in the Auxiliary Channel Analyzer utility to show SCDC reads and writes over the DDC channel
• Run pixel error test on incoming TMDS
• Passively monitor DDC channel in TMDS or FRL mode (FRL mode requires custom cable)
• Passively monitor the TMDS Video and metadata (without HDCP) and DDC channel between a source and sink
• View Lane Error Counts and Reed Solomon Corrections Count in the SCDC CED registers
• Verify the eARC common mode channel on either an eARC Tx or Rx device
• Test sinks with QMS-VRR
• Run HDR10+ Source Side Tone Mapping (SSTM) tests on UHDTVs
• Tests Power Cable Assemblies (PCA) for power requests
• Run test automation for compliance tests with the API